SPRS645F – AUGUST 2010 – REVISED OCTOBER 2013
3.5
3.5.1
Configurations at Reset
Some device configurations are determined at reset. The following subsections give more details.
Device and Peripheral Configurations at Device Reset
Table 3-4 summarizes the device boot and configuration pins that are required to be statically tied high,
tied low, or left unconnected during device operation. For proper device operation, a device reset should
be initiated after changing any of these pin functions.
Table 3-4. Default Functions Affected by Device Configuration Pins
CONFIGURATION PINS
DSP_LDO_EN
SIGNAL NO.
D12
IPU/IPD
FUNCTIONAL DESCRIPTION
DSP_LDO enable input.
This signal is not intended to be dynamically
switched.
0 = DSP_LDO is enabled. The internal DSP LDO
is enabled to regulate power on the DSP_LDOO
pin at either 1.3 V or 1.05 V according to the
LDO_DSP_V bit in the LDOCNTL register, see
Figure 3-1 ). At power-on-reset, the internal POR
monitors the DSP_LDOO pin voltage and
generates the internal POWERGOOD signal
when the DSP_LDO voltage is above a minimum
threshold voltage. The internal device reset is
generated by the AND of POWERGOOD and the
RESET pin.
1 = DSP_LDO is disabled and the DSP_LDOO
pin is in high-impedance (Hi-Z). The internal
voltage monitoring on the DSP_LDOO is
bypassed and the internal POWERGOOD signal
is immediately set high. The RESET pin (D6) will
act as the sole reset source for the device. If an
external power supply is used to provide power to
CV DD , then DSP_LDO_EN should be tied to
LDOI, DSP_LDOO should be left unconnected,
and the RESET pin must be asserted
appropriately for device initialization after
powerup.
Note: to pullup this pin, connect it to the same
supply as LDOI pins.
CLK_SEL
C7
Clock input select.
0 = 32-KHz on-chip oscillator drives the RTC
timer and the system clock generator. CLKIN is
ignored.
1 = CLKIN drives the system clock generator and
the 32-KHz on-chip oscillator drives only the RTC
timer.
This pin is not allowed to change during device
operation; it must be tied to DV DDIO or GND at
the board.
For proper device operation, external pullup/pulldown resistors may be required on these device
configuration pins. For discussion on situations where external pullup/pulldown resistors are required, see
Section 3.8.1 , Pullup/Pulldown Resistors .
This device also has RESERVED pins that need to be configured correctly for proper device operation
(statically tied high, tied low, or left unconnected at all times). For more details on these pins, see Table 2-
20 , Reserved and No Connects Terminal Functions .
Copyright ? 2010–2013, Texas Instruments Incorporated
Product Folder Links: TMS320C5515
Device Configuration
57
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